Maxim Integrated Off Campus Drive 2022 | Freshers | Yield Engineer | B.Tech/ M.Tech – ECE/ EEE/ EIE; M.Sc | 2019 – 2021 Batch | Gandhinagar
Company: Maxim Integrated
Maxim Integrated Off Campus Drive 2022: Maxim Integrated is an American, publicly traded company that designs, manufactures, and sells analog and mixed-signal integrated circuits. Maxim Integrated develops integrated circuits (ICs) for the automotive, industrial, communications, consumer, and computing markets. Headquartered in San Jose, California, the company has design centers, manufacturing facilities, and sales offices throughout the world.
Headquartered in the heart of Silicon Valley with over two billion dollars in sales and more than 7,000 employees, Maxim Integrated is a worldwide leader in designing, manufacturing and selling high-performance semiconductor products.
Company Website: www.maximintegrated.com
Positions: Yield Engineer
Experience: 0 – 2 years
Job Location: Gandhinagar
Salary: Best In Industry
Eligibility Criteria for Maxim Integrated Off Campus Drive 2022:
- Experience: BE/ B.Tech/ ME/ M.Tech (Electronics/ Electrical/ Instrumentation), MSc (Physics or Electronics) from a reputed institute with ~7+ CGPA aggregate score.
- 2019/ 2020/ 2021 Batch
- Preferred work experience in any industrial domain for around 0-2 years.
- Work experience in allied domains like LED, Solar and CMOS research/projects will be given preference.
Job Description:
- Basic understanding of semiconductor manufacturing process, E-Test/WAT and design concepts
- Define and maintain relevant matrixes for product performance, reliability, and yield.
- Analyze semiconductor yield for patterns and signatures.
- Generate and maintain SPC charts for excursion detection and control.
- Look out for possible excursions during wafer processing
- Real Time analysis of Inline fab data on defects, tool status, commonality and root cause analysis, ETest and WAT related parameters and wafer sort parameters which might not limited from design, circuit blocks to test
- Required to be hands-on in day-to-day analysis of information, evaluation and understanding of defect mechanisms, ETest/WAT parameter, wafer sort test and design concepts with the mindset of making a difference.
- Perform root cause analysis for low yields using various advanced data analysis tools
- Statistical and root cause analysis of sort test and parametric test data.
- Should be willing to work with flexible timings which can over-lap global time zones.
- Regular interaction with remote/global teams for projects and resolving yield issues.
- Own product/product line/technology to improve product/technology health and disposition of hold material with highest accuracy and within target.
- Identify systematic issues and D0/Cpk/yield opportunity and drive them to fix
- Connect failure at Etest/WAT or wafer sort to inline/defect modes with driving fix
- Identify design and test issues and work closely with design and test floor for fix
Skills:
- Excellent knowledge of basic science concepts in physics, chemistry, and electronics
- Basic knowledge of Fab yield, product development, validation, design, assembly, and test engineering
- Good knowledge of CMOS device physics (desirable) and basic electronics
- Excellent written and verbal English communication skills
- Good knowledge of MS office tools
- Knowledge of semiconductor wafer fabrication process (desirable)
- Should possess good inter-personal skills
- Problem solving and analytical skills
- Result-orientation and attention to details
How to Apply for Maxim Integrated Off Campus Drive 2022?
Interested and eligible candidates can apply Maxim Integrated Recruitment 2022 online by following link.
Apply Link: Click Here