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ANSYS Recruitment 2018 | R&D Engineering Intern | BE/ B.Tech/ ME/ M.Tech | Bangalore

by Jyostna Biradar
April 27, 2018 - Updated on December 8, 2020
0

ANSYS Recruitment 2018 | Freshers | R&D Engineering Intern | BE/ B.Tech/ ME/ M.Tech | Bangalore | May 2018

Company: ANSYS Software Pvt Ltd
ansys-india-logoANSYS brings clarity and insight to customers’ most complex design challenges through fast, accurate and reliable engineering simulation. Our technology enables organizations no matter their industry to predict with confidence that their products will thrive in the real world. Using simulation, the worlds most innovative companies are able to design products that wouldn’t otherwise be possible to bring to market. Customers trust our software to help ensure product integrity and performance.

Founded in 1970, ANSYS employs more than 2,700 professionals, many of them expert in engineering fields such as finite element analysis, computational fluid dynamics, electronics and electromagnetics, and design optimization.

Company Website: www.ansys.com

Positions: R&D Engineering Intern

Experience: Freshers

Job Location: Bangalore

Salary: Best In Industry

Eligibility Criteria:

  • Progress toward BE / B.Tech or ME / M.Tech degree in Computer Science, Electrical Engineering, or related field
  • Proficiency in Python, C or C++
  • Working knowledge of the Linux operating system
  • Strong basic knowledge of data structures, algorithms, and debugging
  • Basic understanding of electronic design at gate level and/or transistor level
  • Ability to learn quickly, understand complex systems and to work closely with others
  • Ability to complete high-quality work on time

Job Description:

This summer intern will join the RedHawk-SC Research and Development team. He or she will develop features and algorithms for the distributed computing infrastructure, graphical user interface and other advanced design-data-import and analysis capabilities in distributed framework.
Innovation in semiconductor design and manufacturing enables smaller device architectures with higher performance and energy efficiency for powering the smart product revolution. The physics associated with shrinking geometries, especially in the emerging 3-D IC, FinFET and stacked-die architectures, bring out design challenges related to power and reliability, affecting design closure. ANSYS simulation and modeling tools offer the sign-off accuracy and performance needed to ensure power noise integrity and reliability of even the most complex ICs, taking into account electromigration, thermal effects and electrostatic discharge phenomena.

Apply Link:Link Expired

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